Validation of Power Electronics
The development of power electronics is achieved according to the specification and verification along the V-process or, as a consequence of digitalization, in an iterative endless loop and a continuous change in specification and verification in small loops in terms of time and content. In any case, the definition of a feature (specification) is always linked to a verification activity (check). When verifying power electronics, clarification is required as to which test environment and at what point in time during a development project does the specified feature need verification. This decision must consider that verification in each test environment is:
Efficient (economic and fast)
Possible as early as possible in a project
Timely measures and suitable test environments
Entwickler wissen: Der Zeitpunkt, zu dem eine Abweichung festgestellt wird, hat maßgeblichen Einfluss auf den Aufwand für die Fehlerbehebung.
Wird zum Beispiel ein Fehler in der Hardware eines Antriebsumrichters bereits in den ersten Entwicklungsmustern entdeckt, so kann eine Korrektur meistens mit vergleichsweise geringem Aufwand und ohne große Rückwirkungen auf den Terminplan erfolgen. Tritt der Fehler jedoch erst bei der Integration des Antriebsumrichters mit der E-Maschine – oder schlimmstenfalls erst im Feld nach der Auslieferung von Fahrzeugen – auf, ist der Schaden ungleich höher.
Developers know that the point in time that a deviation is determined has a considerable influence on the effort required to eliminate the fault. However, if the fault is only discovered during the integration of the drive inverter with the e-motor, or even worse, in the field after vehicle delivery, the amount of damage is considerably higher.
For this reason, you are justified in being very interested in shifting component testing as far as possible towards early project stages. Our test environments are the keys for this.
What needs to be taken into account when validating?
Ideally, the validation of the drive inverter is carried out independently of the e-motor, so that only a verified inverter is integrated with a (also verified) e-motor to become a powertrain (e-drive).
However, the lack of suitable test environments for the drive inverter often means that the validation of both components (inverter and motor) are merged with the integration of the e-drive and an isolated validation of the drive inverter is ignored. These mutual dependencies make test processes unnecessarily complex and time-consuming. A further disadvantage: Meagre test coverage and test depth.
An optimum test environment for a drive inverter is able to:
Operate without an e-motor
Verify the entire specification framework (validation)
Eliminate the need to adapt the unit-under-test (hardware and software)
Instead of signal-based HiL systems:
Best experience with power hardware-in-the-loop (power-HiL) systems
Our experience at AVL SET shows that power hardware-in-the-loop (power Hil) systems ensure an optimum test environment. Purely signal-based HiL systems are not suitable test environments for power electronics since most of the specification items cannot be verified by them. This is true for hardware and software, and most importantly, safety topics.
In addition, the unit-under-test needs to be largely adapted resulting in a large number of components no longer being in the test loop.
In our experience, signal-HiL systems can only be considered as partial solutions to clarify basic software functions. Always assuming that safety functions are not being qualified!
Different test environments are used, depending on the verification or validation activity, to meet the various test requirements functionally and commercially. AVL SET offers suitably optimized solutions for a range of test requirements: